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This is actually 1.3 a quite hot topic in semiconductor manufacturing.
Here it depends on the material, FSG (flourinated silicon glass) can be
treated nearly as standard, but if we move to lower k films the situation
changes quite dramatically. The main concerns are: change of k value
(e. g. by oxidizing the film in an plasma), sidewall bowing
(the film might be etched at the side walls) or chargeup RIE damage.
Actually it seems that most resist removal on low k material is not done on
ashing equipment but on etching machines. The key point to avoid the damage
mentioned above seems to be, to separate ion density and energy by using an ion
source and add some bias. Means e. g. an ICP or Microwave source and
place the wafer on a stage with RF bias. This processes operate under low
pressure and low temperature and use same chemistries as mentioned above.
There are also reports that alone works.
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